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Tytuł artykułu

Multifunctional unit for reverse conversion and sign detection based on five-moduli set { 2 2n , 2 n + 1, 2 n − 1, 2 n + 3, 2 n − 3 }

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Języki publikacji
EN
Abstrakty
EN
A high dynamic range moduli set { 2 2n , 2 n + 1, 2 n − 1, 2 n + 3, 2 n − 3} has recently been introduced as an arithmetically balanced five-modull set for the residue number system (RNS). In order to utilize this moduli set in applications handling signed numbers, two important components are needed: a sign detector, and a signed reverse converter. However, having both of these components results in high-hardware requirements, which makes RNS impractical. This paper overcomes this problem by designing a unified unit that can perform both signed reverse conversion as well as sign detection through the reuse of hardware. To the authors’ knowledge, this is the first attempt to design a sign detector for a moduli set that includes a {2 n 3} moduli. In order to achieve a hardwareamenable design, we first improved the performance of the previous unsigned reverse converter for this moduli set. Then, we extracted a sign-detection method from the structure of the reverse converter. Finally, we made an unsigned reverse converter-to-sign converter through the use of the extracted sign signal from the reverse converter. The experimental results show that the proposed reverse convertor and sign detector result in improvements of 31% and 28% in area and delay, respectively, as compared to the previous unsigned reverse convertor with sign output using a comparator.
Wydawca
Czasopismo
Rocznik
Tom
Strony
101--121
Opis fizyczny
Bibliogr. 27 poz., rys., tab.
Twórcy
  • Islamic Azad University, Department of Computer Engineering, Kerman Branch, Kerman, Iran
  • Islamic Azad University, Department of Computer Engineering, Kerman Branch, Kerman, Iran
  • Shahid Bahonar University of Kerman, Department of Computer Engineering, Kerman, Iran
Bibliografia
  • [1] Ahmadifar H., Jaberipur G.: A New Residue Number System with 5-Moduli Set: {2 2q, 2 2q ± 3, 2 2q ± 1}, The Computer Journal, vol. 58(7), pp. 1548–1565, 2014.
  • [2] Chang C.H., Molahosseini A.S., Zarandi A.A.E., Tay T.F.: Residue Number Systems: A New Paradigm to Datapath Optimization for Low-Power and High-Performance Digital Signal Processing Applications, IEEE Circuits and Systems Magazine, vol. 15(4), pp. 26–44, 2015.
  • [3] Didier L.S., Rivaille P.Y.: A Generalization of a Fast RNS Conversion for a New 4-Modulus Base, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 56(1), pp. 46–50, 2009. doi: 10.1109/TCSII.2008.2010157.
  • [4] Garner H.L.: The residue number system, IRE Transaction Electric Computer, vol. 8(2), pp. 140–147, 1959.
  • [5] Hiasat A., Sousa L.: On the Design of RNS Inter-Modulo Processing Units for the Arithmetic-Friendly Moduli Sets {2n+k, 2n − 1, 2n+1 − 1}, The Computer Journal, vol. 62(2), pp. 292–300, 2018.
  • [6] Hiasat A., Sousa L.: Sign Identifier for the Enhanced Three Moduli Set {2 n+k, 2 n−1, 2 n+1 − 1}, Journal of Signal Processing Systems, vol. 91(8), pp. 953–961, 2019.
  • [7] Hiasat A., Sweidan A.: Residue number system to binary converter for the moduli set (2n−1, 2 n − 1, 2 n + 1), Journal of Systems Architecture, vol. 49(1–2), pp. 53–58, 2003.
  • [8] Jaberipur G., Ahmadifar H.: A ROM-less reverse RNS converter for moduli set {2q ± 1, 2 q ± 3}, IET Computers & Digital Techniques, vol. 8(1), pp. 11–22, 2013.
  • [9] Kumar R., Mishra R.A.: Design of Efficient Sign Detector for Moduli Set {2 n −1, 2 n, 2 n + 1} in Residue Number System. In: 2019 International Conference on Electrical, Electronics and Computer Engineering (UPCON), pp. 1–5, 2019.
  • [10] Kumar S., Chang C.H.: A VLSI-efficient signed magnitude comparator for {2 n −1, 2 n, 2 n+1 − 1} RNS. In: IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1966–1969, IEEE, 2016.
  • [11] Kumar S., Chang C.H.: A Scaling-Assisted Signed Integer Comparator for the Balanced Five-Moduli Set RNS {2 n − 1, 2 n, 2 n + 1, 2 n+1−, 2 2−1 − 1}. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25(12), pp. 3521–3533, 2017.
  • [12] Matutino P.M., Chaves R., Sousa L.: Binary-to-RNS Conversion Units for moduli {2 n ± 3}. In: 2011 14th Euromicro Conference on Digital System Design, pp. 460–467, IEEE, 2011.
  • [13] Mohan P.V.A.: RNS-to-Binary Converter for a New Three-Moduli Set {2 n+1 − 1, 2 n, 2 n − 1}, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 54(9), pp. 775–779, 2007.
  • [14] Mohan P.V.A.: New reverse converters for the moduli set {2 n − 1, 2 n + 1, 2 n − 3, 2 n + 3}, AEU – International Journal of Electronics and Communications, vol. 62(9), pp. 643–658, 2008.
  • [15] Mohan P.V.A.: Residue Number Systems: Theory and Applications, Springer, 2016.
  • [16] Mohan P.V.A., Premkumar A.B.: RNS-to-Binary Converters for Two Four-Moduli Sets {2 n −1, 2 n, 2 n + 1, 2 n+1 −1} and {2 n −1, 2 n, 2 n + 1, 2 n+1 + 1}, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54(6), pp. 1245–1254, 2007.
  • [17] Molahosseini A.S., Navi K., Dadkhah C., Kavehei O., Timarchi S.: Efficient Reverse Converter Designs for the New 4-Moduli Sets {2 n−1, 2 n, 2 n+1, 2 2n+1−1} and{2 n − 1, 2 n + 1, 2 2n, 2 2n + 1} Based on New CRTs, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 57(4), pp. 823–835, 2010.
  • [18] Molahosseini A.S., Zarandi A.A.E., Martins P., Sousa L.: A Multifunctional Unit for Designing Efficient RNS-Based Datapaths, IEEE Access, vol. 5, pp. 25972–25986, 2017.
  • [19] Moons B., Bankman D., Verhelst M.: Embedded Deep Learning: Algorithms, Architectures and Circuits for Always-on Neural Network Processing, Springer, 2019.
  • [20] Navi K., Molahosseini A.S., Esmaeildoust M.: How to Teach Residue Number System to Computer Scientists and Engineers, IEEE Transactions on Education, vol. 54(1), pp. 156–163, 2011.
  • [21] Saracević M., Adamović S., Miskovic V., Macek N., Sarac M.: A novel approach to steganography based on the properties of Catalan numbers and Dyck words, Future Generation Computer Systems, vol. 100, pp. 186–197, 2019.
  • [22] Sousa L., Antao S., Martins P.: Combining Residue Arithmetic to Design Efficient Cryptographic Circuits and Systems, IEEE Circuits and Systems Magazine, vol. 16(4), pp. 6–32, 2016.
  • [23] Sousa L., Martins P.: Sign Detection and Number Comparison on RNS 3-Moduli Sets {2 n − 1, 2 n+x , 2 n + 1}, Circuits, Systems, and Signal Processing, vol. 36(3), pp. 1224–1246, 2016.
  • [24] Stanimirović P., Krtolica P., Saracević M., Masović S.: Decomposition of Catalan Numbers and Convex Polygon Triangulations, International Journal of Computer Mathematics, vol. 91(6), pp. 1315–1328, 2014.
  • [25] Wang Y., Song X., Aboulhamid M., Shen H.: Adder Based Residue to Binary Numbers Converters for {2 n − 1, 2 n, 2 n + 1}, IEEE Transactions on Signal Processing, vol. 50(7), pp. 1772–1779, 2002.
  • [26] Zarandi A.A.E., Molahosseini A.S., Sousa L., Hosseinzadeh M.: An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form {2 k , 2 P − 1}, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25(1), pp. 48–59, 2017.
  • [27] Zheng X., Wang B., Zhou C., Wei X., Zhang Q.: Parallel DNA Arithmetic Operation With One Error Detection Based on 3-Moduli Set, IEEE Transactions on NanoBioscience, vol. 15(5), pp. 499–507, 2016.
Uwagi
PL
„Opracowanie rekordu ze środków MNiSW, umowa Nr 461252 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2021).”
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-190a24fe-d001-4db3-b6f7-f06eb3c0b9b5
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