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An Efficient Classification of Hyperspectral Remotely Sensed Data Using Support Vector Machine

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EN
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EN
This work present an efficient hardware architecture of Support Vector Machine (SVM) for the classification of Hyperspectral remotely sensed data using High Level Synthesis (HLS) method. The high classification time and power consumption in traditional classification of remotely sensed data is the main motivation for this work. Therefore presented work helps to classify the remotely sensed data in real-time and to take immediate action during the natural disaster. An embedded based SVM is designed and implemented on Zynq SoC for classification of hyperspectral images. The data set of remotely sensed data are tested on different platforms and the performance is compared with existing works. Novelty in our proposed work is extend the HLS based FPGA implantation to the onboard classification system in remote sensing. The experimental results for selected data set from different class shows that our architecture on Zynq 7000 implementation generates a delay of 11.26 μs and power consumption of 1.7 Watts, which is extremely better as compared to other Field Programmable Gate Array (FPGA) implementation using Hardware description Language (HDL) and Central Processing Unit (CPU) implementation.
Twórcy
  • Department of Electronics and Communication Engineering, JSS Academy of Technical Education Bengaluru and Affiliated to Visvesvaraya Technological University, Belagavi, India
  • Department of Electronics and Communication Engineering, JSS Academy of Technical Education Bengaluru and Affiliated to Visvesvaraya Technological University, Belagavi, India
Bibliografia
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  • 3. S. Lucana, M. Enrico, V. Raffaele, “Highly-Parallel GPU Architecture for Lossy Hyperspectral Image Compression”, IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing (J-STARS), vol. 6, No. 2, pp. 670-68, 2013. https://doi.org/10.1109/JSTARS.2013.2247975
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  • 5. Dequan Liu, Guoqing Zhou, Jingjin Huang, Rongting Zhang, Lei Shu, Xiang Zhou, and Chun Sheng Xin, “On-Board Geo referencing Using FPGA-Based Optimized Second-Order Polynomial Equation”, Remote Sens., vol. 11, pp.1-28, 2019. http://doi.org/10.3390/rs11020124
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  • 8. G. Camps Valls, L. Bruzzone, “Kernel-based methods for hyperspectral image classification”, IEEE Transaction on Geoscience and Remote Sensing, vol. 43, No. 6, pp.1351-1362, 2005. https://doi.org/10.1109/TGRS.2005.846154
  • 9. S. M. Afifi, H. GholamHosseini, and R. Sinha, “Hardware Implementations of SVM on FPGA: A State-of-the-Art Review of Current Practice”, International Journal of Innovative Science, Engineering & Technology, vol. 2, pp. 733-752, 2015.
  • 10. Mahendra HN, Mallikarjunaswamy S, Siddesh GK, Komala M, Sharmila N, “Evolution of real-time onboard processing and classification of remotely sensed data”, Indian Journal of Science and Technology, vol. 13, pp. 2010-2020, 2020. https://doi.org/10.17485/IJST/v13i20.459
  • 11. Shradha Gupta, Sumeet Saurav, Sanjay Singh, Anil K Saini, Ravi Saini, “VLSI Architecture of Exponential Block for Non-Linear SVM Classification”, IEEE International Conference on Advances in Computing, Communications and Informatics, pp.128-132, 2015. https://doi.org/10.1109/ICACCI.2015.7275662
  • 12. Sumeet Saurav, Ravi Saini, and Sanjay Singh, “FPGA Based Implementation of Linear SVM for Facial Expression Classification”, IEEE International Conference on Advances in Computing, Communications and Informatics, pp. 766-773, 2018. https://doi.org/10.1109/ICACCI.2018.8554645
  • 13. Markos Papadonikolakis, Christos-Savvas Bouganis, “A Novel FPGA-based SVM Classifier”, IEEE International Conference on Field Programmable Technology, pp.283-290, 2010. https://doi.org/10.1109/FPT.2010.5681485
  • 14. Yiyue Jiang, Kushal Virupakshappa and Erdal Oruklu, 2017, “FPGA Implementation of a Support Vector Machine Classifier for Ultrasonic Flaw Detection”, IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 180-183, Aug. 2017. https://doi.org/10.1109/MWSCAS.2017.8052890
  • 15. Kevin M. Irick, Michael DeBole, Vijaykrishnan Narayanan, and Aman Gayasen, “A hardware efficient support vector machine architecture for FPGA”, IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 304-305, Apr. 2008. https://doi.org/10.1109/FCCM.2008.40
  • 16. Papadonikolakis, M. and Bouganis C S, “Novel cascade FPGA accelerator for sup- port vector machines classification”, IEEE Transactions on Neural Networks and Learning Systems, pp.1040-1052, 2012. https://doi.org/10.1109/TNNLS.2012.2196446
  • 17. Kyrkou, C. and Theocharides, T, “SCoPE: Towards a systolic array for SVM object detection”, IEEE Embedded Systems Letters, pp. 46-49, 2009. http://doi.org/10.1109/LES.2009.2034709
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  • 22. M. Pietron, M. Wielgosz, D. Zurek, E. Jamro, and K. Wiatr, “Comparison of GPU and FPGA Implementation of SVM Algorithm for Fast Image Segmentation,” Architecture of Computing Systems–ARCS, -Springer, pp. 292-302, 2013. https://doi.org/10.1007/978-3-642-36424-2_25
  • 23. Vivado High-Level Synthesis, Available: http://www.xilinx.com/products/designtools/vivado/integration/esl-design.html
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  • 27. Ning Ma, Shaojun Wang, Syed Mohsin Ali, Xiuhai Cui and Yu Peng, “High Efficiency On-Board Hyperspectral Image Classification with Zynq SoC”, MATEC Web of Conferences, 2016. https://doi.org/10.1051/matecconf/20164505001
  • 28. Mahendra H N, Shivakumar B R, Praveen J, “Pixel-based Classification of Multispectral Remotely Sensed Data Using Support Vector Machine Classifier”, International Journal Of Innovative Research In Electrical, Electronics, Instrumentation And Control Engineering, vol. 3, pp. 94-98, Apr. 2015. http://doi.org/10.1109/IACC.2016.20
  • 29. Mahendra H N, Mallikarjunaswamy S, Rekha V, Puspalatha V, Sharmila N, “Performance Analysis of Different Classifier for Remote Sensing Application”, International Journal of Engineering and Advanced Technology, vol. 9, pp. 7153-7158, Oct. 2019. https://doi.org/10.35940/ijeat.a1879.109119
  • 30. Shaojun Wang, Xinyu Niu, Ning Ma, Wayne Luk, Philip Leong, and Yu Peng, “A Scalable Dataflow Accelerator for Real Time Onboard Hyperspectral Image Classification” Applied Reconfigurable Computing: 12th International Symposium, ARC 2016 http://doi.org/10.1007/978-3-319-30481-6_9
  • 31. Abelardo Baez, Himar Fabelo, Samuel Ortega, Giordana Florimbi, Emanuele Torti , Abian Hernandez, Francesco Leporati, Giovanni Danese, Gustavo M. Callico and Roberto Sarmiento, “High-Level Synthesis of Multiclass SVM Using Code Refactoring to Classify Brain Cancer from Hyperspectral Images”, MDPI Electronics, 2019. https://doi.org/10.3390/electronics8121494
  • 32. Nitish Srivastava, Steve Dai, Rajit Manohar, and Zhiru Zhang, “Accelerating Face Detection on Programmable SoC Using C-Based Synthesis”, Proceedings of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, pp. 195-200, February 2017. https://doi.org/10.1145/3020078.3021753
  • 33. Yiyue Jiang, Kushal Virupakshappa and Erdal Oruklu, “FPGA Implementation of a Support Vector Machine Classifier for Ultrasonic Flaw Detection”, IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017 https://doi.org/10.1109/MWSCAS.2017.8052890
  • 34. Christos Kyrkou, Christos-Savvas Bouganis, Theocharis Theocharides, and Marios M. Polycarpou, “Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines”, IEEE Transactions On Neural Networks And Learning Systems, Vol. 27, No. 1, January 2016. https://doi.org/10.1109/TNNLS.2015.2428738
  • 35. Mercedes E. Paoletti , Juan M. Haut, Xuanwen Tao, Javier Plaza Miguel and Antonio Plaza, “A New GPU Implementation of Support Vector Machines for Fast Hyperspectral Image Classification”, MDPI Remote sensing Journal, Feb. 2020. https://doi.org/10.3390/rs12081257
  • 36. Sen Ma, Xuan Shi, and David Andrews, “Parallelizing maximum likelihood classification (MLC) for supervised image classification by pipelined thread approach through high-level synthesis (HLS) on FPGA cluster”, BIG EARTH DATA, Taylor & Francis Group VOL. 2, NO. 2, pp. 144–158, 2018. https://doi.org/10.1080/20964471.2018.1470249
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  • 38. Murad Qasaimeh, Assim Sagahyroon, and Tamer Shanableh, “FPGA-based Parallel Hardware Architecture for Real-Time Image Classification”, IEEE Transactions on Computational Imaging, Volume 1, Issue 1, March 2015. https://doi.org/10.1109/TCI.2015.2424077
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-17005b9c-52b2-4dc3-9618-036c7b97d6f9
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