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3D-BPM simulation design of a compact 3-dB optical power splitter using a 2 × 2 RI-MMI coupler on silicon waveguide

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Języki publikacji
EN
Abstrakty
EN
Multimode interference (MMI) waveguides are favoured for their wide bandwidth, extensive fabrication tolerance, high stability, effective light confinement, and minimal transmission loss. In this study, the authors propose a numerical design of an optical power splitter based on restricted interference (RI) mechanisms using silicon-on-insulator waveguides, where the precise positioning of input pairs and subsequent adjustment of the MMI region length are essential aspects. The RI-MMI configuration facilitates the reduction of the MMI length due to the applied interference theory. The authors’ design undergoes a rigorous simulation and optimization using a highly accurate three-dimensional beam propagation method (3D-BPM) simulation method to ensure optimal performance. Simulation results confirm the authors high-performance design with low excess loss (< 2.7 dB), small relative phase difference (< 2%), negligible residual (< -18 dB), excellent coupling ratio (- 0.09 dB to 0.05 dB), and high balance factor (< - 17 dB) across the wide range of 100 nm (1500 nm–1600 nm). Furthermore, the authors’ optimized design exhibits a width tolerance of ± 2.1 μm and a height tolerance of ± 10 nm. Notably, the core component of the splitter is housed within an extremely compact footprint area of 6 μm × 65 μm. These exceptional characteristics position the authors’ proposed device as highly promising for large-scale integrated optical circuits, as well as photonic neural networks in ultrawideband telecom applications.
Rocznik
Strony
art. no. e155674
Opis fizyczny
Bibliogr. 39 poz., rys., wykr.
Twórcy
  • Faculty of Electronics Engineering 1 & EDA Lab, Posts and Telecommunications Institute of Technology, Hanoi, Vietnam
  • Faculty of Postgraduate, Posts and Telecommunications Institute of Technology, Hanoi, Vietnam
  • Advanced Institute of Science and Technology-The University of Danang, Danang, Vietnam
  • Faculty of Electronics Engineering 1 & EDA Lab, Posts and Telecommunications Institute of Technology, Hanoi, Vietnam
Bibliografia
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Uwagi
Opracowanie rekordu ze środków MNiSW, umowa nr POPUL/SP/0154/2024/02 w ramach programu "Społeczna odpowiedzialność nauki II" - moduł: Popularyzacja nauki (2025).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-15d222d9-a597-40ae-b47d-53169b0393d8
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