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Application of Neural Network for Testing Selected Specification Parameters of Voltage-Controlled Oscillator

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EN
Abstrakty
EN
In this paper, the application of the Artificial Neural Network (ANN) algorithm has been used for testing selected specification parameters of voltage-controlled oscillator. Today, mixed electronic circuits specification time is an issue. An analog part of Phase Locked Loop is a voltage-controlled oscillator, which is very sensitive to variation of the technology process. Fault model for the integrated circuit voltage control oscillator (VCO) in ring topology is introduced and the before test stage classificatory is designed. In order to reduce testing time and keep the specification accuracy (approximation) on the high level, an artificial neural network has been applied. The features selection process and output coding for specification parameters are described. A number of different ANN have been designed and then compared with real specification of the VCO. The results obtained gives response in short time with high enough accuracy.
Twórcy
autor
  • Institute of Electronics, Silesian University of Technology, Poland
autor
  • Institute of Electronics, Silesian University of Technology, Poland
Bibliografia
  • [1] M. Tadeusiewicz, A. Kuczyński, and S. Hałgas, “Spot Defect Diagnosis in Analog Nonlinear Circuits with Possible Multiple Operating Points,” J. Electron. Test., vol. 31, no. 5-6, pp. 491-502, Dec. 2015.
  • [2] K. Huang, H. G. Stratigopoulos, S. Mir, C. Hora, Y. Xing, and B. Kruseman, “Diagnosis of Local Spot Defects in Analog Circuits,” IEEE Trans. Instrum. Meas., vol. 61, no. 10, pp. 2701-2712, Oct. 2012.
  • [3] P. Jantos, T. Golonek, and J. Rutkowski, “An analogue electronic circuits specification driven testing with the use of time domain response’s features,” in Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2011, 2011, pp. 485-489.
  • [4] D. Grzechca, “Construction of an Expert System Based on Fuzzy Logic for Diagnosis of Analog Electronic Circuits,” Int. J. Electron. Telecommun., vol. 61, no. 1, pp. 77-82, Mar. 2015.
  • [5] M. Tadeusiewicz, S. Hałgas, and A. Kuczyński, “New Aspects of Fault Diagnosis of Nonlinear Analog Circuits,” Int. J. Electron. Telecommun., vol. 61, no. 1, pp. 83-93, Mar. 2015.
  • [6] B. Long, M. Li, H. Wang, and S. Tian, “Diagnostics of Analog Circuits Based on LS-SVM Using Time-Domain Features,” Circuits Syst. Signal Process., vol. 32, no. 6, pp. 2683-2706, Dec. 2013.
  • [7] L. Chruszczyk and J. Rutkowski, “Specialised excitation and wavelet feature extraction in fault diagnosis of analog electronic circuits,” in 2008 15th IEEE International Conference on Electronics, Circuits and Systems, 2008, pp. 242-246.
  • [8] M. J. Burbidge and A. Richardson, “Phase-locked loop test methodologies: Current characterization and production test practices,” pp. 99-136, Jan. 2008.
  • [9] “Wiley: Microwave and Wireless Synthesizers: Theory and Design - Ulrich L. Rohde.” [Online]. Available: http://www.wiley.com/WileyCDA/WileyTitle/productCd-0471520195.html. [Accessed: 03-Jun-2017].
  • [10] O.-R. J. Manuel, M.-B. M. del Rosario, G. Eduardo, and V.-C. H. Rene, “Artificial Neural Networks Modeling Evolved Genetically, a New Approach Applied in Neutron Spectrometry and Dosimetry Research Areas,” in Proceedings of the 2008 Electronics, Robotics and Automotive Mechanics Conference, Washington, DC, USA, 2008, pp. 387-392.
  • [11] J. Łęski, Systemy neuronowo-rozmyte. Warszawa: Wydawnictwa Naukowo-Techniczne, 2008.
  • [12] J. A. K. Suykens, T. Van Gestel, J. De Brabanter, and B. De Moor, “Least Squares Support Vector Machines,” World Sci.
Uwagi
Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2018).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-1485c130-82da-4a8e-a436-30c1ee3f656e
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