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Content available remote Analysis of A-DLTS spectra of MOS structures with thin NAOS SiO2 layers
A set of MOS structures with thin SiO2 layers prepared by nitric acid oxidation (NAOS) method was investigated using acoustic deep level transient spectroscopy (A-DLTS) to explain the role of annealing treatment (post-oxidation annealing (POA) and post-metallization annealing (PMA)) at different conditions on the distribution of interface states. The activation energies of interface states and the corresponding capture cross-section were calculated both from Arrhenius plots constructed for individual peaks of the A-DLTS spectra and applying the method of modeling of measured acoustic spectra. The energy distribution of the interface states was determined also from the dependence of acoustoelectric response signal (ARS) on the external bias voltage (U ac - V G curves). By comparing the A-DLTS spectra, U ac - V G characteristics and some electrical measurements (G-V, I-V curves) of investigated MOS structures with no treatment with those treated with POA and/or PMA, the role of individual treatments was observed. The definite decrease of the interface states in the structures with the PMA treatment in comparison with the POA treatment was confirmed too.
The rigorous numerical analysis of the surface photovoltage (SPV) versus excitation UV-light intensity (Φ), from 104 to 1020 photon/(cm2s) in a metal/insulator/n-GaN structure with a negative gate voltage (VG = –2 V) was performed using a finite element method. In the simulations we assumed a continuous U-shape density distribution function Dit(E) of the interface states and n-type doping concentration ND = 1016 cm–3. The SPV signal was calculated and compared in three different characteristic regions at the interface, namely i) under the gate centre, ii) near the gate edge and iii) between the gate and ohmic contact. We attributed the differences in SPV(Φ) dependences to the influence of the interface states in terms of the initial band bending and interface recombination controlled by the gate bias. The obtained results are useful for the design of GaN-based UV-radiation photodetectors.
In this paper MIS equivalent electrical circuit of Au/Pd/Ti–SiO2–GaAs has been analyzed by a comparison of the results obtained from admittance and DLTS spectroscopy. Two groups of peaks with different magnitude and different gate voltage dependence have been observed in DLTS and admittance spectra. Based on the analysis of the peaks behavior, it has been concluded that they are associated with the response of bulk traps and interface states, respectively. In order to characterize bulk traps and interface states responsible for the occurrence of two groups of peaks in normalized conductance spectra we have used the equivalent circuit with two CPE-R branches. The time constant values estimated for both peaks from admittance analysis have been compared with the time constant determined from DLTS analysis. Some discrepancies have been noted between the time constants obtained for interface states whereas the time constants for bulk traps were compatible. It has been also demonstrated that when conductance peaks overlap, the admittance experimental data can be fitted by the equivalent electrical model with only one CPE-R branch. However, in this case incomplete information about the analyzed process has been obtained despite the fact that all model validity criteria can be fulfilled and the model seems to be correct.
Content available remote Study of density of interface states in MOS structure with ultrathin NAOS oxide
The quality of the interface region in a semiconductor device and the density of interface states (DOS) play important roles and become critical for the quality of the whole device containing ultrathin oxide films. In the present study the metal-oxide-semiconductor (MOS) structures with ultrathin SiO2 layer were prepared on Si(100) substrates by using a low temperature nitric acid oxidation of silicon (NAOS) method. Carrier confinement in the structure produces the space quantization effect important for localization of carriers in the structure and determination of the capacitance. We determined the DOS by using the theoretical capacitance of the MOS structure computed by the quantum mechanical approach. The development of the density of SiO2/Si interface states was analyzed by theoretical modeling of the C-V curves, based on the superposition of theoretical capacitance without interface states and additional capacitance corresponding to the charges trapped by the interface states. The development of the DOS distribution with the passivation procedures can be determined by this method.
Ultrathin silicon dioxide (SiO2) layers formed on Si substrate with nitric acid have been investigated using both acoustic deep-level transient spectroscopy (A-DLTS) and electrical methods to characterize the interface states. The set of SiO2/Si structures formed in different conditions (reaction time, concentrations of nitric acid (HNO3), and SiO2 thickness [3–9 nm]) was prepared. The leakage current density was decreased by post-oxidation annealing (POA) treatment at 250°C in pure nitrogen for 1 h and/or post-metallization annealing (PMA) treatment at 250°C in a hydrogen atmosphere for 1 h. All structures of the set, except electrical investigation, current-voltage (I - V), and capacitance — voltage (C - V) measurements, were investigated using A-DLTS to find both the interface states distribution and the role of POA and/or PMA treatment on the interface-state occurrence and distribution. The evident decreases of interface states and shift of their activation energies in the structures with PMA treatment in comparison with POA treatment were observed in most of the investigated structures. The results are analyzed and discussed.
Content available remote Określanie schematów pasmowych struktur MOS na podłożu SiC(4H)
W celu określenia schematów pasmowych struktur MOS wykonanych na podłożu z węglika krzemu SiC(4H) wykorzystano szereg technik charakteryzacji: elektrycznych, optycznych oraz fotoelektrycznych. Szczególnie przydatne są pomiary fotoelektryczne, które pozwalają na wyznaczenie wysokości barier potencjału na powierzchniach granicznych dielektryka, jak również pozwalają na określenie położenia energetycznego stanów powierzchniowych na granicy SiO2/SiC. Praca przedstawia wyniki pomiarów wykonanych na kondensatorach MOS z aluminiową bramką Al oraz z warstwą dielektryka wykonaną w dwóch różnych technologiach (chemiczne osadzanie i termiczne utlenianie).
In order to determine band diagrams of the MOS structures made on SiC(4H) substrate several measurement techniques were used: electrical, optical and photoelectric methods. Particularly photoelectric methods are useful since they allow determination of barrier heights at the both dielectric interfaces. In this work measurement results performed on MOS capacitors with aluminum metal gate and with different dielectric layers (chemical deposition and thermal oxidation) are presented.
Content available Energy concepts involved in MOS characterization
Starting from a quantum statistical reasoning, it is demonstrated that entropy properties of silicon/silicon dioxide interface electron traps may have a strong influence on measured distributions of interface states, depending on measurement method used. For methods, where the Fermi-level is used as a probe to define an energy position, the scale is based on free energy. On the other hand, methods based on thermal activation of electrons give the distribution on an enthalpy scale. It is shown that measured interface state distributions are influenced by the distribution of entropy, and that common features of measured energy distributions may be influenced by entropy variations. These results are used to interpret experimental data on the energy distribution of electron capture cross sections with an exponential increase followed by a more or less constant value as the energy distance of the traps from the conduction band edge increases. Such a relation is shown to be consistent with a situation where the emission and capture processes of electrons obey the Meyer-Neldel rule.
Content available Modeling of negative bias temperature instability
Negative bias temperature instability is regarded as one of the most important reliability concerns of highly scaled PMOS transistors. As a consequence of the continuous downscaling of semiconductor devices this issue has become even more important over the last couple of years due to the high electric fields in the oxide and the routine incorporation of nitrogen. During negative bias temperature stress a shift in important parameters of PMOS transistors, such as the threshold voltage, subthreshold slope, and mobility is observed. Modeling efforts date back to the reaction-diffusion model proposed by Jeppson and Svensson thirty years ago which has been continuously refined since then. Although the reaction-diffusion model is able to explain many experimentally observed characteristics, some microscopic details are still not well understood. Recently, various alternative explanations have been put forward, some of them extending, some of them contradicting the standard reaction-diffusion model. We review these explanations with a special focus on modeling issues.
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