In this paper, thermal oxidation resistance of silicide-coated niobium substrates was tested in a temperature range of 1300–1450°C using an HVOF burner. Pure niobium specimens were coated using the pack cementation CVD method. Three different silicide thickness coatings were deposited. Thermal oxidation resistance of the coated niobium substrates was tested in a temperature range of 1300–1450°C using an HVOF burner. All samples that passed the test showed their ability to stabilize the temperature over a time of 30 s during the thermal test. The rise time of substrate temperature takes about 10 s, following which it keeps constant values. In order to assess the quality of the Nb-Si coatings before and after the thermal test, light microscopy, scanning electron microscopy (SEM) along with chemical analysis (EDS), X-ray diffraction XRD and Vickers hardness test investigation were performed. Results confirmed the presence of substrate Nb compounds as well as Si addition. The oxygen compounds are a result of high temperature intense oxidizing environment that causes the generation of SiO phase in the form of quartz and cristobalite during thermal testing. Except for one specimen, all substrate surfaces pass the high temperature oxidation test with no damages.
In this study, the combined effect of Zr and Si on isothermal oxidation of Ti for 25 and 50h at 820°C, which is the temperature related to exhaust valves operation, was investigated. Si addition into Ti-5mass%Zr alloy led to a distribution of silicide Ti5Si3 phase formed by a eutectic reaction. The Ti sample containing only Zr showed more retarded oxidation rate than Ti-6Al-4V, the most prevalent Ti alloy, at the same condition. However, while a simultaneous addition of Zr and Si resulted in greater increase of oxidation resistance. The oxide layer formed after the addition of Zr and Si comprised TiO2, ZrO2, and SiO2.
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A mechanism of carriers transport through metal-semiconductor interface created by nickel or titanium-based ohmic contacts on Si-face n-type 4H-SiC is presented herein. The mechanism was observed within the temperature range of 20 °C - 300 °C which are typical for devices operating at high current density and at poor cooling conditions. It was found that carriers transport depends strongly on concentration of dopants in the epitaxial layer. The carriers transport has thermionic emission nature for low dopant concentration of 51016 cm-3. The thermionic emission was identified for moderate dopant concentration of 5-1017 cm-3 at temperatures higher than 200 °C. Below 200 °C, the field emission dominates (for the same doping level of 5-1017 cm-3). High dopant concentration of 5-1018 cm-3 leads to almost pure field emission transport within the whole investigated temperature range.
The current trend in scaling transistor gate length below 60 nm is posing great challenges both related to process technology and circuit/system design. From the process technology point of view it is becoming increasingly difficult to continue scaling in traditional way due to fundamental limitations like resolution, quantum effects or random fluctuations. In turn, this has an important impact on electrical device specifications especially leakage current and the circuit power dissipation.
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