Preferencje help
Widoczny [Schowaj] Abstrakt
Liczba wyników
Tytuł artykułu

Programmable, Asynchronous, Triangular Neighborhood Function for Self-Organizing Maps Realized on Transistor Level

Treść / Zawartość
Warianty tytułu
Języki publikacji
A new hardware implementation of the triangular neighborhood function (TNF) for ultra-low power, Kohonen self-organizing maps (SOM) realized in the CMOS 0.18žm technology is presented. Simulations carried out by means of the software model of the SOM show that even low signal resolution at the output of the TNF block of 3-6 bits (depending on input data set) does not lead to significant disturbance of the learning process of the neural network. On the other hand, the signal resolution has a dominant influence on the overall circuit complexity i.e. the chip area and the energy consumption. The proposed neighborhood mechanism is very fast. For an example neighborhood range of 15 a delay between the first and the last neighboring neuron does not exceed 20 ns. This in practice means that the adaptation process starts in all neighboring neurons almost at the same time. As a result, data rates of 10-20 MHz are achievable, independently on the number of neurons in the map. The proposed SOM dissipates the power in-between 100 mW and 1 W, depending on the number of neurons in the map. For the comparison, the same network realized on PC achieves in simulations data rates in-between 10 Hz and 1 kHz. Data rate is in this case linearly dependend on the number of neurons.
  • Institute of Electrical Engineering, University of Tecnology and Life Sciences, ul. Kaliskiego 7, 85-796, Bydgoszcz, Poland,
  • [1] S. Osowski and T. H. Linh, “ECG beat recognition using fuzzy hybrid neural network,” IEEE Transactions on Biomedical Engineering, vol. 48 (11), November 2001.
  • [2] A. Wismüller, O. Lange, R. Dersh et al., “Cluster analysis of biomedical image time-series,” International Journal of Computer Vision, vol. 46 (2), February 2002.
  • [3] T. Kohonen, Self-Organizing Maps. Berlin: Springer, 2001.
  • [4] P. Boniecki, “The kohonen neural network in classification problems solving in agricultural engineering,” Journal of Research and Applications in Agricultural Engineering, vol. 50 (1), pp. 37-40, January 2005.
  • [5] I. Mokriš and R. Forgáč, “Decreasing the feature space dimension by kohonen self-organizing maps,” in Proc. 2nd Slovakian - Hungarian Joint Symposium on Applied Machine Intelligence, Herĺany, Slovakia, 2004.
  • [6] F. Li, C. H. Chang, and L. Siek, “A compact current mode neuron circuit with gaussian taper learning capability,” IEEE International Symposium on Circuits and Systems, pp. 2129-2132, May 2009.
  • [7] M. T. Abuelma'ati and A. Shwehneh, “A reconfigurable gaussian/triangular basis function computation circuit,” IEEE International Conference on Computer Systems and Applications, pp. 232-239, March 2006.
  • [8] D. S. Masmoudi, A. T. Dieng, and M. Masmoudi, “A subtreshold mode programmable implementation of the gaussian function for rbf neural networks applications,” in Proc. IEEE International Symposium on Intelligent Control, October 2002, pp. 454-459.
  • [9] R. Długosz, M. Kolasa, and W. Pedrycz, “Programmable triangular neighborhood functions of kohonen self-organizing maps realized in CMOS technology,” in Proc. European Symposium on Artificial Neural Networks (ESANN09), Bruges, Belgium, April 2010, pp. 529-534.
  • [10] R. Długosz and M. Kolasa, “CMOS, programmable, asynchronous neighborhood mechanism for wtm kohonen neural network,” in Proc. International Conference Mixed Design of Integrated Circuits and Systems (MIXDES08), Poland, June 2008, pp. 197-201.
  • [11] R. Długosz, T. Talaśka, W. Pedrycz, and R. Wojtyna, “Realization of a conscience mechanism in CMOS implementation of winner takes all neural networks,” IEEE Transactions on Neural Networks, vol. 21 (6), pp. 961-971, June 2010.
  • [12] P. Dubois, C. Botteron, V. Mitev, C. Menon, P. A. Farine, P. Dainesi, A. Ionescu, and H. Shea, “Ad hoc wireless sensor networks for exploration of solar-system bodies,” Acta Astronautica, vol. 64 (5-6), pp. 626-643, 2009.
  • [13] R. Długosz and M. Kolasa, “Optimization of the neighborhood mechanism for hardware implemented kohonen neural networks,” in Proc. European Symposium on Artificial Neural Networks (ESANN09), Bruges, Belgium, April 2009, pp. 565-570.
  • [14] V. Peiris, “Mixed analog-digital VLSI implementation of a kohonen neural network,” Ph.D. dissertation, Ph.D thesis, Ecole Polytechnique Fédérale de Lausanne (EPFL), 1994.
  • [15] C. H. Chang, J. Gu, and M. Zhang, “A review of 0.18m full adder performances for tree structured arithmetic circuits,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13 (6), pp. 686-695, June 2005.
Typ dokumentu
Identyfikator YADDA
JavaScript jest wyłączony w Twojej przeglądarce internetowej. Włącz go, a następnie odśwież stronę, aby móc w pełni z niej korzystać.