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FPGA Neural Network implementation for real time control

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Języki publikacji
EN
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EN
This paper describes an efficient implementation of neural multi-layer networks on FPGA fabric (Field Programmable Gate Array). A back-propagation algorithm was used for the training task while implementation and synthesis tools are centered on the ISE 6.3 of Xilinx with the targeted components being VirtexII and VirtexIIPro. A fixed point and a floating point number representation were used for encoding real numbers and for data processing, respectively. The realization of the activation function was carried out according to three methods, for which the results of simulation and synthesis are also presented. The implementation performances were tested using an approximation of some linear and non-linear functions. Of particular importance, two experimental evaluations involving the speed and the position control of a DC motor are given to demonstrate the features of the adopted methodology.
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15--37
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Bibliogr. 22 poz., rys., tab.
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Bibliografia
  • [1] M. SKRBEK: Fast neural network implementation. Neural Network World,9 (1999), 375-391.
  • [2] J. G. ELDREDGE: FPGA density enhancement of neural network through runtime reconfiguration. Master's thesis. Department of Electrical and Computer Engineering, Birgham Young University, 1994.
  • [3] D. E. RUMELHART, J. L. MCCLELLAND and PDP RESEARCH GROUP: Parallel distributed processing: exploration in the microstructure of cognition. MIT Press, Cambridge, Massachusetts, 1, 1986.
  • [4] J. J. HOPFIELD and D. W. TANK: Computing with neural circuits: a model. Science, 233 (1986), 625-633.
  • [5] J. P. LE BOUQUIN: IBM Microelectronics ZISC: Zero instruction set computer. Proc. World Congress on Neural Networks, San Diego, Supplement, (1994).
  • [6] C. E. COX and E. BLANZ: Ganglion, a fast field-programmable gate array implementation of a connectionist classifier. IEEE J. Solid-State Circuits, 28 (1992), 288-299.
  • [7] M. MCKENNA and B. WILAMOWSKI: Implementing a fuzzy system on a field programmable gate array. Int. Joint Conf. on Neural Networks, Washington DC, (2001), 189-194.
  • [8] J. ZHU and P. SUTTON: FPGA implementation of neural networks. A survey of a decade of progress. The University of Queensland, Brisbane, Australia, 2002.
  • [9] D. N. MENARD and O. SENTIEYS: A methodology for evaluating the precision of fixed-point systems. Int. Conf. Acoustics, Speech and Signal Processing, Orlando, (2002).
  • [10] J. L. HOLT and T. E. BAKER: Back propagation simulations using limited precision calculations. Int. Joint Coq: Neural Networks, (1991), 121-126.
  • [11] K. NICHOLS, M. MOUSSA and S. AREIBI: Feasibility of floating point arithmetic in FPGA based artificial neural networks. Proc. 15th Int. Coq: Computer Applications in Industry and Engineering, San Diego, California, USA, (2002), 8-13.
  • [12] D. F. WOLF, R. A. F. ROMERO and E. MARQUES: Using embedded processors in hardware models of artificial neural networks. Proc. Simposio Brasileiro de Automao Inteligente, (2001), 78-83.
  • [13] A. R. OMONDI and J.C. RAJAPAKSE: FPGA Implementation of neural networks. Dordrecht, The Netherlands, Springer, 2006.
  • [14] J. L. BEUCHAT and A. TISSERAND: Operateur en-ligne sur FPGA pour l'implementation de quelques fonctions elementaires. RENPAR'14/ASF/SYMBA, Tunisie, 2002.
  • [15] M. AUMIAUX: Logique binaire, Fonctions lo giques et arithmetique binaire (Masson).
  • [16] A. OZMEN, F. TEKCE and K. VARDAR: Hardware implementation of neuromodel. Proc. Int. Con!: Signal Processing, (2003).
  • [17] www.celoxica.com
  • [18] G. DREYFUS and al.: Reseaux de neurones: Methodologie et applications, Algorithmes, 2. Eyrolles, Paris, 2004.
  • [19] W. T. M ILLER, R. S. SUTTON and P. J. WERBOS: Neural networks for control. MIT Press, Cambridge, Massachusetts, 1990.
  • [20] K. J. HUNT, D. SBARBARO, R. ZBIKWOSKI, and P. J. GAWTHROP: Neural networks for control systems - A survey. Automatica, 28(6), (1992), 1083-1112.
  • [21] P. J. ASHENDEN: The student's guide to VHDL. Morgan Kaufmann, San Francisco, 1998.
  • [22] M. KAWATO: Schemes and models for control of arm trajectory. MIT Press, Cambridge, Massachusetts, 1990.
Typ dokumentu
Bibliografia
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bwmeta1.element.baztech-article-BSW3-0037-0002
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